Why AI Is Pushing Memory Chip Prices Higher Through 2028
- S&P Global Ratings confirmed on 11 June 2026 that the memory chip price forecast extends through at least 2028, making this one of the most durable repricing events in recent consumer electronics history.
- Samsung, SK Hynix, and Micron collectively control roughly 89% of global DRAM supply, and all three have redirected capacity toward high-margin HBM for AI customers, structurally tightening commodity memory availability.
- Memory now accounts for approximately 35% of laptop bill-of-materials costs according to HP Q1 2026 earnings disclosures, up from 15-18% previously, with Microsoft Surface prices rising approximately 50-60% as a direct result.
- New leading-edge memory fabs cost between $15 billion and $25 billion and require 3-4 years from groundbreaking to volume production, meaning no meaningful new capacity reaches the market before the late 2020s.
- Memory suppliers are direct beneficiaries of the structural repricing cycle, while consumer hardware OEMs face margin compression or forced price increases, with outcomes differentiated by brand pricing power and product mix.
Microsoft’s new Surface Pro 13-inch launched at $1,499 in 2026, a full 50% above its $999 predecessor. The culprit was not a design overhaul or a new operating system. It was memory chips.
A structural reallocation of global semiconductor manufacturing capacity toward AI data-centre hardware has tightened supply for the commodity DRAM and NAND that sit inside every consumer PC, smartphone, and router. S&P Global Ratings confirmed on 11 June 2026 that favourable conditions for memory chip suppliers are projected to persist through at least 2028, making this one of the more durable repricing events in the recent history of consumer electronics.
This analysis explains the mechanism driving the memory chip price forecast, why established procurement strategies are no longer containing the cycle, and what the structural shift means for investors across memory suppliers, consumer hardware OEMs, and AI infrastructure names.
How AI data centres captured the memory supply chain
Three companies control the chokepoint through which nearly all of the world’s DRAM flows:
- Samsung: approximately 40-45% of global DRAM market share in early 2026
- SK Hynix: approximately 25-30%
- Micron Technology: approximately 20-25%
Combined, these producers account for roughly 89% of global DRAM supply. When all three redirect wafer starts toward the same customer class, the downstream effects are unavoidable.
AI servers require high-bandwidth memory (HBM), a specialised variant of DRAM, and advanced DDR5 in volumes that dwarf conventional server requirements. A single AI training cluster can consume more memory than thousands of standard enterprise servers. Data centres’ share of global memory consumption has risen sharply from approximately 32% five years ago, with some industry estimates suggesting it could approach 70% of global supply in 2026 (a directionally illustrative figure that has not been independently verified).
The result is not a production collapse. Total fab output has remained broadly stable. What changed is where that output goes.
Why manufacturers followed the money
HBM commands substantially higher margins than commodity DRAM. The premium reflects the advanced packaging requirements, the locked-in multi-year contracts hyperscalers are willing to sign, and the sheer urgency of AI infrastructure timelines.
Each of the three major producers arrived at the same conclusion independently: redirecting capacity toward AI customers is the rational economic decision. Hyperscalers are paying premiums to secure supply, effectively pushing consumer OEMs to the back of the allocation queue. This is not a coordinated strategy; it is a market-incentive outcome replicated across the industry.
The DRAM shortage is not simply a matter of insufficient capital: Google CEO Sundar Pichai has identified memory availability as the primary constraint on AI infrastructure expansion, even against approximately $180 billion in planned annual hyperscaler capital expenditure, a framing that redefines how analysts should model demand elasticity in this cycle.
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What memory chips actually are and why they dominate device costs
DRAM and NAND are the two categories of memory inside virtually every electronic device, and they perform fundamentally different jobs. DRAM (dynamic random-access memory) is working memory: the space where a device holds the data it is actively processing. When a laptop runs a browser, an operating system, and a spreadsheet simultaneously, all of that lives in DRAM. NAND is storage: the permanent memory that holds files, applications, and the operating system itself when the device is powered off.
HBM is the AI-specific variant of DRAM. It stacks multiple DRAM layers vertically using through-silicon vias and interposers, a three-dimensional packaging process that cannot be performed on standard production lines. Each of these packaging steps requires separate multi-year capital investment cycles, which is why HBM capacity cannot be expanded quickly even when demand surges.
HP Q1 2026 Earnings Disclosure: Memory now accounts for approximately 35% of laptop bill-of-materials costs, up from 15-18% in the prior quarter, representing a near-doubling of memory’s share of total system cost.
The cost-share shift is not confined to laptops. Memory’s share of router manufacturing costs has reportedly risen from approximately 3% to more than 20% in a single year (a directionally illustrative figure that has not been independently confirmed).
| Memory Type | Primary Function | AI Relevance | Laptop Cost-Share Impact | Router Cost-Share Impact |
|---|---|---|---|---|
| DRAM (DDR4/DDR5) | Active processing memory | Standard (consumer); high (server DDR5) | Rising sharply toward 35% of BOM | Rising from ~3% to >20% |
| NAND | Permanent storage | Standard (consumer); moderate (enterprise SSDs) | Moderate increase alongside DRAM | Smaller proportional increase |
| HBM | AI training and inference memory | Mission-critical for AI workloads | Not used in consumer laptops | Not used in routers |
The real-world pricing evidence, from Surface to supply chains
Microsoft Surface Pro 13-inch: $1,499 in 2026, up from $999 in 2024. Surface Laptop: $1,599, up from $999. The increase: approximately 50-60%, driven primarily by memory cost inflation.
The Surface pricing is not a product repositioning. These are not premium-tier redesigns with new form factors or display technologies. According to Yahoo Finance reporting, AI-driven memory demand was cited as a primary driver of the price jump. The cost increase flowed directly from the bill of materials to the retail tag.
The chain from AI investment to consumer sticker shock follows a specific sequence:
- Hyperscalers commit hundreds of billions in AI capex, requiring massive HBM and server DRAM volumes
- Memory manufacturers redirect wafer starts toward HBM and DDR5 for AI customers
- Commodity DRAM and NAND supply for consumer devices tightens
- OEM bill-of-materials costs rise as memory’s share of total system cost increases
- Retail prices rise where OEMs pass costs through, or gross margins compress where they absorb them
HP’s Q1 2026 earnings commentary corroborates the pattern from the OEM perspective. DDR4 and NAND contract prices moved materially higher in late 2025 as AI infrastructure demand tightened supply across the board.
Any OEM with limited pricing power faces the same arithmetic. Premium brands are increasingly choosing pass-through. Budget-oriented manufacturers face margin compression with fewer options for offset.
Electronics price pressure in 2026 is not solely a memory story: US tariff policy is compounding the memory-driven cost increase for PC and smartphone manufacturers, with all five largest PC makers having warned of additional price increases in the second half of the year, creating a double squeeze on OEM margins from two structurally different but simultaneously active forces.
Why the memory chip price forecast extends to 2028 and beyond
S&P Global Ratings, 11 June 2026: Favourable conditions for memory chip suppliers are projected to persist through at least 2028.
That projection rests on multiple structural constraints, each reinforcing the others.
The current memory chip supercycle departs from every previous DRAM upcycle in one critical respect: hyperscaler capex commitments now extend multi-year contracts that lock allocation before commodity markets can respond, removing the demand-softening mechanisms that ended prior cycles within 12-18 months.
Leading-edge memory fabs cost between $15 billion and $25 billion per facility and require 3-4 years from groundbreaking to volume production, followed by additional customer qualification timelines. Even with aggressive capital commitments announced in 2025 and 2026, no meaningful new capacity reaches the market before the late 2020s.
The packaging bottleneck operates on a separate timeline. HBM’s dependence on three-dimensional stacking, through-silicon vias, and specialised interposer technology means that even redirecting raw wafer output would not immediately resolve the AI memory supply equation. Each packaging capability requires its own multi-year investment ramp.
What could break the cycle early
Two scenarios represent the most credible interruption risks.
The first is a sharper-than-expected decline in AI capital expenditure from major hyperscalers. Technology companies are on track to spend approximately $650 billion on AI and data-centre infrastructure in 2026, roughly 80% above the prior year (a directionally illustrative figure that has not been independently verified). A material pullback would ease demand pressure on HBM and allow commodity memory supply to normalise faster than current forecasts assume.
The second is an accelerated efficiency breakthrough that materially reduces per-model memory requirements. Algorithmic and hardware efficiency improvements could reduce the memory intensity of some AI workloads over time. However, current industry forecasts, including commentary from IDC and other analysts, suggest these gains will not offset total demand growth through 2028.
Both scenarios are best characterised as tail risks to a base case of elevated pricing, not as probable near-term outcomes.
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Where this leaves investors across the memory and hardware stack
The structural dynamic creates a clear asymmetry. Memory suppliers sit on the favourable side of the repricing cycle. Consumer hardware OEMs sit on the pressure side, with outcomes differentiated by brand pricing power and product mix.
| Segment | Impact Direction | Key Variables | Portfolio Implication |
|---|---|---|---|
| Memory suppliers (Samsung, SK Hynix, Micron) | Positive: higher ASPs, better margins, longer upcycle | HBM capacity mix, contract pricing, capex plans | Direct beneficiaries of structural repricing |
| AI infrastructure and hyperscalers | Largely insulated: costs absorbed within AI capex or passed through | AI capex intensity, HBM supply-chain commentary | Memory costs a manageable line item |
| Consumer hardware OEMs | Negative: margin compression or retail price increases | Pricing power, product mix, gross margin guidance | Selective exposure to premium brands only |
| Thematic and ETF investors | Repositioning underway toward memory and AI infrastructure | Fund inflows, sector allocation shifts | Memory now a core AI leverage point, not a supporting commodity |
Three portfolio construction adjustments follow directly from this analysis:
- Overweight memory suppliers and select AI-infrastructure names that benefit from tight supply and sustained pricing power, tracking HBM mix and contract pricing commentary as the primary monitoring variables
- Maintain selective exposure to hardware OEMs with strong brands and premium positioning that can pass through costs, while remaining cautious on highly price-sensitive product segments
- Incorporate the assumption that elevated DRAM and NAND prices persist into the second half of the decade when modelling earnings and valuation scenarios, rather than defaulting to a pre-AI cyclical reversion baseline
Past performance does not guarantee future results. Financial projections are subject to market conditions and various risk factors.
The memory cycle has a new floor, and it is priced into the next device
AI’s redirection of global memory capacity has transformed DRAM and NAND from boom-bust commodities into structural bottleneck assets. The cost floor for every device that depends on them has moved higher, and the S&P Global Ratings forecast through at least 2028, the 3-4 year fab construction timeline, and the locked-in hyperscaler procurement contracts all point to a repricing that outlasts the typical 12-18 month memory cycle.
For consumers, the $1,499 Surface Pro is the new baseline, not the exception. For investors, the same dynamic that raises device prices extends the earnings runway for memory suppliers and compresses margins at OEMs that lack pricing power.
The memory repricing cycle sits inside a broader persistent inflation regime where 13 simultaneous structural reversals, from deglobalisation to energy transition costs, have moved the underlying price floor for goods categories that depend on globally traded commodities; memory chips are among the most visible current expressions of that shift, but the regime extends well beyond the semiconductor supply chain.
The variables to monitor from here: S&P Global and analyst forecast updates, hyperscaler capex guidance each quarter, HBM pricing commentary in Samsung, SK Hynix, and Micron earnings calls, and gross margin trends at major OEMs. Each offers a real-time signal on whether the structural case is holding or beginning to crack.
This article is for informational purposes only and should not be considered financial advice. Investors should conduct their own research and consult with financial professionals before making investment decisions.
Frequently Asked Questions
What is the memory chip price forecast through 2028?
S&P Global Ratings confirmed on 11 June 2026 that favourable conditions for memory chip suppliers are projected to persist through at least 2028, driven by sustained AI data centre demand for HBM and DDR5 memory that has structurally tightened commodity DRAM and NAND supply.
Why are consumer electronics prices rising due to memory chips?
AI hyperscalers are paying premiums to lock up HBM and advanced DDR5 supply, pushing consumer OEMs to the back of the allocation queue; memory now accounts for approximately 35% of laptop bill-of-materials costs, up from 15-18% previously, and those costs are flowing directly to retail prices.
Which companies control the global DRAM supply chain?
Three companies control roughly 89% of global DRAM supply: Samsung (approximately 40-45% market share), SK Hynix (approximately 25-30%), and Micron Technology (approximately 20-25%), meaning their collective capacity decisions have an outsized impact on prices across all device categories.
How does AI infrastructure spending affect commodity memory prices?
When hyperscalers commit billions in AI capex requiring massive HBM volumes, memory manufacturers redirect wafer starts away from commodity DRAM and NAND, tightening supply for consumer devices and forcing OEMs to absorb higher input costs or raise retail prices.
What are the biggest risks that could end the memory upcycle before 2028?
The two most credible interruption risks are a sharper-than-expected decline in hyperscaler AI capital expenditure and an accelerated algorithmic efficiency breakthrough that materially reduces per-model memory requirements; both are currently characterised as tail risks rather than probable near-term outcomes.

