Adisyn (AI1) Graphene Breakthrough – Tech Milestone

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Adisyn Ltd

  • ASX Code: AI1
  • Market Cap: $55,147,545
  • Cash: $6,062,000 (as of 30 October 2025)

Adisyn Ltd (ASX: AI1) Announces Graphene Deposition Milestone for Semiconductor Manufacturing

Adisyn Ltd (ASX: AI1), in a recent ASX announcement, has reported a significant Adisyn graphene deposition milestone. The company successfully validated a critical sub-process within the pre-clean stage of its proprietary low-temperature graphene growth sequence. This achievement confirms that Adisyn’s patented Atomic Layer Deposition (ALD) approach can effectively prepare wafer surfaces at temperatures compatible with existing semiconductor fabrication processes, a major step towards commercialising graphene semiconductor interconnects.

The development addresses one of the semiconductor industry’s most pressing challenges, as traditional copper interconnects approach their physical limits at sub-2nm process nodes. With the global semiconductor market expanding and the demand for advanced computing power accelerating, this progress positions the company to contribute to next-generation chip manufacturing technology.

Why Does Low-Temperature Graphene Deposition Matter for Semiconductor Manufacturing?

Traditional graphene growth processes require extreme temperatures between 900-1000°C, making them incompatible with standard semiconductor manufacturing environments. Adisyn’s innovative low-temperature approach is designed for direct graphene growth on semiconductor wafers within conventional fabrication conditions, potentially altering how next-generation chips are produced.

The company’s five-stage process architecture includes pre-treatment, graphene synthesis, material characterisation, post-annealing, and parameter optimisation. This latest validation demonstrates that wafer surfaces can be prepared with the atomic-scale precision required for subsequent graphene deposition, all whilst maintaining semiconductor-compatible temperatures.

Key Process Advantages:

  • Designed for seamless integration with existing semiconductor manufacturing infrastructure
  • Avoids the need for costly high-temperature equipment modifications
  • Creates a pathway towards faster, smaller, and more energy-efficient chips
  • Directly addresses a critical bottleneck in AI and computing advancement

Furthermore, the successful validation provides confidence to proceed into broader deposition trials while continuing to refine remaining pre-clean sub-processes. This systematic approach reduces technical risk whilst accelerating the overall development timeline.

What Makes Graphene Superior to Traditional Copper Interconnects?

As chip features shrink beyond 2 nanometres, copper interconnects become increasingly inefficient, creating electrical resistance, heat generation, and energy waste. These limitations present a challenge to the continued miniaturisation and performance scaling that underpin modern computing and artificial intelligence.

Graphene, composed of a single layer of carbon atoms in a hexagonal lattice, offers superior electrical conductivity, exceptional heat resistance, and remarkable mechanical strength compared to copper. The material’s unique properties position it as a candidate for next-generation semiconductor interconnects, provided manufacturing challenges can be addressed.

Copper vs. Graphene Performance Comparison:

Property Copper Interconnects Graphene Interconnects
Electrical Conductivity Decreases at small scales Superior at all scales
Heat Resistance Limited Exceptional
Manufacturing Temperature Standard Previously too high
Energy Efficiency Declining Enhanced
Mechanical Strength Moderate Outstanding

The company’s work specifically addresses the manufacturing temperature challenge, potentially enabling low-temperature graphene growth within existing semiconductor fabrication facilities.

How Does This Technical Achievement Impact Semiconductor Innovation?

The successful validation confirms that Adisyn’s process architecture performs to design expectations and provides confidence to proceed with broader deposition trials. This Adisyn graphene deposition milestone brings the industry closer to replacing copper interconnects with graphene alternatives.

The achievement demonstrates measurable advancement in developing a repeatable, scalable, low-temperature graphene deposition process. Moreover, it validates the company’s fundamental approach to addressing a significant challenge in semiconductor manufacturing at sub-2nm process nodes.

Immediate Development Priorities:

  • Extensive deposition trials using multiple carbon-ring-based precursor compounds
  • Continued refinement of remaining sub-processes within the pre-clean stage
  • Optimisation of deposition parameters including plasma power and gas flow rates
  • Characterisation of resulting films to assess structure and electrical conductivity
  • Progressive convergence on a full, scalable graphene growth methodology

The experimental campaign will continue through late 2025 and into 2026, focusing on iterative improvements across all critical parameters.

What Market Opportunity Does Graphene Semiconductor Technology Address?

The semiconductor industry faces high demand for computing power, driven by artificial intelligence, advanced communications, and next-generation technologies. With copper interconnects approaching physical limits as performance requirements accelerate, the market opportunity for alternative solutions is substantial.

The advanced packaging market is expanding at a 7.1% CAGR, whilst AI chip demand creates an urgent need for innovative interconnect solutions. Major industry players including NVIDIA, Applied Materials, and NXP are actively seeking alternatives to traditional copper interconnects.

Industry Context:

  • The global semiconductor market is on a steady growth trajectory.
  • Increasing miniaturisation is pushing copper beyond its performance limits.
  • AI workloads require dramatically enhanced chip efficiency.
  • Energy consumption concerns are driving demand for more efficient solutions.

Success in achieving further technical milestones could enable faster, smaller, and more energy-efficient chips to power the next generation of AI, computing, and communications technologies.

Who Leads Adisyn’s Graphene Development Programme?

Adisyn’s graphene programme is driven by a multi-disciplinary team of more than 20 experts across Israel, Europe, and the United States. This global approach brings together specialists in Atomic Layer Deposition, Chemical Vapour Deposition, Physical Vapour Deposition, nanomaterials, semiconductor process design, plasma engineering, and advanced characterisation techniques.

Leadership Team Expertise:

Role Name Background
Chairman Kevin Crofton Former CEO of Comet AG and SPTS Technologies, past Chair of SEMI International
CEO, 2D Generation Arye Kohavi Water-Gen founder, Foreign Policy 100 Leading Global Thinkers
VP R&D Miri Kish Dagan Award-winning technologist with 20+ years in semiconductor innovation
Technology Leader Paul Rich Former VP of Technology and Engineering at SPTS Technologies

The team’s combined experience spans critical technology domains essential for advancing the technology towards commercial readiness.

Which Key Collaborations Support the Technology Development?

Adisyn’s development efforts are supported by leading institutional and industry partners that provide access to advanced facilities and collaborative expertise. These partnerships position the company among emerging players globally in commercialising graphene for semiconductor interconnects.

Key Collaborations:

  • Tel Aviv University Nano Centre: Providing parallel ALD capacity and advanced characterisation tools.
  • imec (Belgium): The world’s foremost semiconductor R&D hub, engaged in simulation and validation testing.
  • Connecting Chips (EU): A European semiconductor integration initiative linking Adisyn with major technology companies.

The Connecting Chips initiative connects Adisyn with industry leaders including NVIDIA, Valeo, NXP, and Applied Materials, providing direct access to potential commercialisation partners and market validation opportunities.

What Are the Next Development Milestones?

Following the successful pre-clean validation, Adisyn has outlined a systematic development roadmap extending through late 2025 and into 2026. The company’s approach is designed to build upon the successful Adisyn graphene deposition milestone and involves parallel development tracks to optimise the low-temperature process.

Development Timeline and Objectives:

Quarter Activity Focus Expected Outcomes
Q4 2025 Extensive deposition trials with precursor compounds Process parameter optimisation
Q1 2026 Film characterisation and quality assessment Structure and conductivity validation
Q2 2026 Scalable graphene growth methodology Commercial viability assessment

The experimental campaign will systematically address process parameter optimisation, surface uniformity improvement, and reproducibility enhancement—all critical factors for commercial viability.

How Does This Milestone Position Adisyn in the Graphene Market?

This Adisyn graphene deposition milestone represents meaningful advancement towards enabling direct, low-temperature graphene integration onto semiconductor wafers. By validating a critical part of its pre-clean process, Adisyn Ltd (ASX: AI1) has reduced technical risk and strengthened its position in the development of next-generation semiconductor interconnects.

This progress confirms the viability of its proprietary approach, potentially offering a scalable solution to the industry’s challenges at sub-2nm process nodes and paving the way for future commercialisation opportunities.

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